Version 1.1 of ai05s/ai05-0171-1.txt

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!standard D.13.1(4/2)          09-10-22 AI05-0171-1/01
!class Amendment 09-10-22
!status work item 09-10-22
!status received 09-10-22
!priority Medium
!difficulty Easy
!subject Ravenscar Profile for Multi-Processor Systems
!summary
The Ravenscar Profile, originally designed for single processors, has proven remarkably useful for modelling verifiable real-time single-processor systems. It can be extended to support multi-processor systems using a fully partitioned approach. The implementation of this scheme is simple, and it can be used to develop applications amenable to schedulability analysis.
!problem
The Ravenscar Profile defines a deterministic and analysable tasking model for single processors which can be supported with a run-time system of reduced size and complexity. For multi-processor systems, the Ravenscar Profile could be extended using a fully partitioned approach, with each task allocated statically to a concrete processor. This scheme could be supported by a streamlined run-time system, and applications built following this approach can apply timing analysis techniques on each processor separately.
!proposal
We propose to allow the implementation of the Ravenscar Profile on multi-processor systems following a fully partitioned approach.
!wording
Clause D.13.1 should be modified to add the following implementation advice.
Implementation advice
On a multi-processor system, an implementation should support a fully partitioned approach, with each task allocated statically to a concrete processor and no task migration. Each processor should have separate and disjoint ready queues. A task should only be on the ready queues of one processor, and the processor to which a task belongs should be defined statically. Whenever a task running on a processor reaches a task dispatching point, it goes back to the ready queues of the same processor.
protected objects should be the only task synchronization mechanism. for inter-processor communication, an implementation should provide the necessary locking mechanism to achieve the required mutual exclusion among tasks executing on different processors.
!discussion
** TBD ** (Why is this model preferred??)
!example
** TBD **
--!corrigendum D.13.1(4/2)
!ACATS test
Add an ACATS C-Test of this package.
!appendix

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