CVS difference for ai05s/ai05-0009-1.txt
--- ai05s/ai05-0009-1.txt 2011/01/31 04:50:12 1.15
+++ ai05s/ai05-0009-1.txt 2011/02/08 08:21:05 1.16
@@ -2896,3 +2896,109 @@
****************************************************************
+From: Robert Dewar
+Sent: Tuesday, July 13, 2010 7:10 PM
+
+> It is illegal to apply either an Independent or Independent_Components
+> pragma to a component, object, or type if the implementation cannot
+> provide the independent addressability required by the pragma (see 9.10).
+>
+> It is illegal to specify a representation aspect for a component,
+> object, or type to which pragma Independent or Independent_Components
+> applies, in a way that prevents the implementation from providing the
+> independent addressability required by the pragma.
+
+ type r is array (0 .. 31) of Boolean;
+ pragma pack (r);
+ pragma Independent_Components (r);
+
+Well the implementation cannot provide independent addressability for r, so the
+IC pragma is illegal, by para 1.
+
+On the other hand, we could say that the pragma Pack is illegal because the IC
+is there, and the IC is not illegal.
+
+Of course it is really programs that are illegal, but I find it odd to have
+these two intepretations!
+
+In GNAT we will always flag the IC pragma in this case, which is certainly
+conforming.
+
+P.S. I found a way to do a bit better than my threatened implementation earlier
+today.
+
+I plan to let the back end layout the type, then check if all components are
+reasonably byte aligned on a byte machine, or word aligned on a word machine,
+and if so, allow the IC, otherwise disallow it.
+
+****************************************************************
+
+From: Bob Duff
+Sent: Tuesday, July 13, 2010 7:23 PM
+
+> Of course it is really programs that are illegal, but I find it odd to
+> have these two intepretations!
+
+Formally, compilation units can be illegal, and programs (partitions?) can be
+illegal. But I agree it's nice to be able to blame it on a particular line of
+code.
+
+> In GNAT we will always flag the IC pragma in this case, which is
+> certainly conforming.
+
+Yes.
+
+> P.S. I found a way to do a bit better than my threatened
+> implementation earlier today.
+>
+> I plan to let the back end layout the type, then check if all
+> components are reasonably byte aligned on a byte machine, or word
+> aligned on a word machine, and if so, allow the IC, otherwise disallow it.
+
+By the way, isn't there a much bigger concern these days? Namely, false
+aliasing due to cache collisions across CPUs?
+
+Should the Independent_Components thing cause the compiler to allocate
+(e.g) arrays of bytes so that the bytes go in different cache lines?
+
+****************************************************************
+
+From: Robert Dewar
+Sent: Tuesday, July 13, 2010 7:27 PM
+
+Virtually all common machines implement cache coherence, if you don't have cache
+coherence you are really out of luck. Remember that cache lines are often huge,
+so putting one byte per cache line is out of the question.
+
+****************************************************************
+
+From: Bob Duff
+Sent: Tuesday, July 13, 2010 7:53 PM
+
+> Virtually all common machines implement cache coherence, if you don't
+> have cache coherence you are really out of luck.
+
+I'm not talking about coherence, here. I'm talking about speed.
+
+>...Remember that cache
+> lines are often huge, so putting one byte per cache line is out of
+>the question.
+
+One byte per cache line is exactly what you want, for speed, if you have one
+thread per byte, each grinding upon that byte. I'm just asking what's expected
+of this pragma -- merely ensuring that multiple tasks can access independent
+components. versus also requesting that such access be efficient. ?
+
+****************************************************************
+
+From: Robert Dewar
+Sent: Tuesday, July 13, 2010 9:12 PM
+
+> One byte per cache line is exactly what you want, for speed, if you
+> have one thread per byte, each grinding upon that byte.
+
+I don't think you will ever be ahead that way, not allocating 256 bytes for each
+byte in the string. You will increase page pressure intolerably etc. The cache
+coherence stuff is pretty cheap, and of course on a multi-core setup, free.
+
+****************************************************************
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